Design of a 1st Generation Neurocomputer

An electrically trainable artificial neural network (ETANN) with 10240 'floating gate' synapses

1989 • 409 citations

Parallel architectures for artificial neural nets

1988 • 138 citations

A reconfigurable CMOS neural network

1990 • 64 citations

CMOS VLSI implementation of the 2D-DCT with linear processor arrays

2002 • 34 citations

The RAP: a ring array processor for layered network calculations

2002 • 32 citations

Unified Description of Neural Algorithms for Time-Independent Pattern Recognition

1991 • 21 citations

Systolic architectures for fast emulation of artificial neural networks

1990 • 16 citations

WSI architecture of a neurocomputer module

2002 • 9 citations

Microelectronics for artificial neural nets

1989 • 7 citations

HARDWARE CONCEPTS FOR NEURAL NETWORKS

1990 • 4 citations